A 6-b 1Gsample/s SiGe BiCMOS A/D Converter

Matteo Parenti, Andrea Boni, Davide Vescovi
Abstract:
The paper describes the design of a 1GS/s 6-bit ADC in SiGe BiCMOS technology. Several techniques such as subranging, interpolation and averaging were implemented on the original flash architecture in order to achieve low power consumption without sacrificing linearity and dynamic performance.
Keywords:
Analog to Digital (A/D) converter, averaging, SiGe BiCMOS
Download:
IMEKO-TC4-2002-036.pdf
DOI:
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Event details
IMEKO TC:
TC4
Event name:
TC4 Conference and Workshop 2002
Title:
4th International Conference on Advanced A/D and D/A Conversion Techniques and their Applications (together with 7th IMEKO TC4 Workshop on ADC Modelling and Testing)
Place:
Prague, CZECH REPUBLIC
Time:
26 June 2002 - 28 June 2002